NXP Semiconductors /MIMXRT1011 /CCM /CMEOR

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Interpret as CMEOR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MOD_EN_OV_GPT_0)MOD_EN_OV_GPT 0 (MOD_EN_OV_PIT_0)MOD_EN_OV_PIT 0 (MOD_EN_OV_TRNG_0)MOD_EN_OV_TRNG

MOD_EN_OV_PIT=MOD_EN_OV_PIT_0, MOD_EN_OV_GPT=MOD_EN_OV_GPT_0, MOD_EN_OV_TRNG=MOD_EN_OV_TRNG_0

Description

CCM Module Enable Overide Register

Fields

MOD_EN_OV_GPT

Overide clock enable signal from GPT - clock will not be gated based on GPT’s signal ‘ipg_enable_clk’

0 (MOD_EN_OV_GPT_0): don’t override module enable signal

1 (MOD_EN_OV_GPT_1): override module enable signal

MOD_EN_OV_PIT

Overide clock enable signal from PIT - clock will not be gated based on PIT’s signal ‘ipg_enable_clk’

0 (MOD_EN_OV_PIT_0): don’t override module enable signal

1 (MOD_EN_OV_PIT_1): override module enable signal

MOD_EN_OV_TRNG

Overide clock enable signal from TRNG

0 (MOD_EN_OV_TRNG_0): don’t override module enable signal

1 (MOD_EN_OV_TRNG_1): override module enable signal

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